ASM Community    The Assembly Language Resource

2010-09-09 10:16:55 *
Welcome, Guest. Please login or register.
Did you miss your activation email?

Login with username, password and session length
   
   Home   Help Search Calendar Login Register  
Pages: 1 [2]
  Print  
Author Topic: DynatOS 64-bit is here!!!  (Read 10988 times)
0 Members and 1 Guest are viewing this topic.
f0dder
Community Staff
ASM Fanatic
*****
Offline Offline

Posts: 7744


Front Line Assembly


WWW
« Reply #15 on: 2007-10-27 23:19:31 »

I've always chosen the platform that made the most sense at the time - C=64, Amiga600, AMD 486dx4, Intel p200-mmx, AMD K6-2 350 (or was it 333? Buggy at any rate, but nice), Slot-A Athlon 700, Intel P4 northwood 2.53, AMD64 3500+, AMD64x2 4400+... And unless something radical happens, my next box will either be a core2 duo or a core2 quatro, depending.

I've also changed between ATi and NVidia, although I've been sticking with nv for the last few generations because of very nast ATi drivers. Anyway, that was just to point out I'm not a fanboi (in this regard, anyway ^_^).

Yes, Itanium wasn't marketed at end-users, price tag is too heavy and it's not really suitable for it (sure it'd run spreadsheets and browser and what 90% of end-users need, but pricetag + power consumption...), and the hardware x86 emulation was beaten by software emulation (typical of intel to screw up things like that). I'm not familiar enough with the architecture to say anything else about it, so I'm not saying it would be the perfect candidate for moving us over.

I do think AMD ruined or chances of escaping x86 anytime soon, though... the only thing that would be a big enough carrot (perceived or real) to move people over to a new arch, including pains of porting applications, was 32->64bit move. We aren't going to see anything of quite that magnitude for quite some time.

Yes, I'm very well aware that x86 CPUs are internally RISC, but what I wanted to escape is all the legacy hardware, the junky legacy crap in the CPU (16bit, segments, structures that are more complex than needed for 286 pmode compatibility, defunct hardware taskswitching, heck perhaps even paging). And perhaps a nicer instruction set with destination register and less hardcoded register dependencies, more unshadowed registers, getting rid of instructions that are faster to implement with multiple other instructions, etc.

But we're not going to get that now. Yeah yeah, backwards compatibility etc., but anything 64-bit produced now is fast enough to run legacy 32-bit applications that won't be ported just fine (okay, for games it might be different story).

Quote from: SpooK
I personally think the SSE race has gotten out of hand. I guess that is the cost of keeping chip-producing companies in business.
They're adding too many small things too fast, imho... they should focus a bit more on chip bugs and optimization (speeding up vmx, for instance), and then think through the SSE instructions a bit more. I think it's a bit weird seeing CPU crc support.

Quote from: SpooK
Not entirely. AMD can continue to low-ball Intel on the cost of the final processor product in order to compete...
How long can they continue to do that without going bankrupt? I wonder if the ATi merger was a good idea... the CPU/GPU integration is somewhat interesting, but mostly for OEMs and not enthusiasts, which tend to be the guys that buy AMD hardware.
Logged

- carpe noctem
bitRAKE
Community Guru
ASM Fanatic
****
Offline Offline

Posts: 3928


Reductio Ad Absurdum


WWW
« Reply #16 on: 2007-10-27 23:30:40 »

They're adding too many small things too fast, imho... they should focus a bit more on chip bugs and optimization (speeding up vmx, for instance), and then think through the SSE instructions a bit more. I think it's a bit weird seeing CPU crc support.
AMD's SSE5 is a huge change: http://developer.amd.com/sse5.jsp

...not to mention it doesn't play well with recent Intel extensions. AMD certainly wants to bite off big chunks of Intel, but they're not in a position to chew. There has to be another piece to their stategy that isn't quite clear?
Logged

Growth becomes exponential when your focus shifts away from perceiving the world through division. The differences hold things together as much as their similarities. Hatred stems from intimate knowledge of something. We rise out of defeat. Understand the game and it becomes an endless source of enjoyment.
ti_mo_n
ASM Fanatic
****
Offline Offline

Posts: 1132



« Reply #17 on: 2007-10-28 21:24:31 »

(...)SSE5(...)
FMADDPS seems to accelerate matrix multiplication. But what for? 90% of the GFX (and that's where the power is really needed) is done in hardware by the GFX card. I've been opting for the same things f0dder is: decrease the number of junk instructions ( == decrease the overall price) and then start thinking about adding something new. I don't see any use for like 40% of all current x86 instructions. I've been coding in ARM asm recently and found that many instructions can be executed conditionally. Now that's what I'd like to have in x86! Damn, even 8080 had a conditional call and conditional ret. And it had a "jump to an address stored in a register" in 1-byte instruction (it was perfect for loops). So why does x86 have a lot of junk instructions and very few 'nice' instructions? Someone should tell Intel and AMD what ASM programmers would really like to have ^^'


BTW: hi everyone, long time no see ^^'
« Last Edit: 2007-10-29 00:29:31 by ti_mo_n » Logged

There are 10 types of people: Those who understand binary and those who don't.
Pages: 1 [2]
  Print  
 
Jump to:  

Powered by MySQL Powered by PHP Powered by SMF 1.1.11 | SMF © 2006-2009, Simple Machines LLC Valid XHTML 1.0! Valid CSS!