Wizzra, are you gonna build a Compiler?, you can take my MASM source to made a compiler as a Picture ( or maybe modified whole thing ).
Posted on 2003-06-30 08:18:16 by realvampire
realvampire hi,
i am coding a disassembler, and using The Svin's help, its going really nice,
not much left to do, just few weeks of non stop coding i may finish the engine and than i can continue coding the gui and mabye implementing a debuger.
this is for my final school prj in coolege.
many thnx for TheSvin! u should all appriciate his extremly good info on opcodes and the willing to help & give info!
he is like MSDN for Opcode decoding for me :) :alright:
Posted on 2003-06-30 09:31:03 by wizzra
Thank you, wizzra.
For those who read the tuts and understand about
reg codes a little macros for short typing.
it uses reg code instead of reg mnemonins and allows you
to numerous various pushs or pops in one short line


pushr macro r
irpc n,r
db (50h or n)
endm
endm
popr macro r
irpc n,r
db (58h or n)
endm
endm

for example you need


push eax
push eax
push ecx
push eax
push edi

you now can just type a short line:

pushr 00107

each character represents a code for a reg you want to push.
You may create such macros also for inc,dec,xchg (eax,reg)

Of course it's much easier only for those who knows the codes.
But you know it, don't you? There are just 8 of them.
Posted on 2003-06-30 10:48:26 by The Svin
Actually I would like to thank you, The Svin. Now I know the size of my code when coding with or without an assembler. :grin:

Anyway is it possible for the shift family (sal, shl, shr, ror, rcr, rcl and so on) to have sib? I suppose it is possible right?
Posted on 2003-06-30 11:06:20 by roticv
check this:

D1 04 00? ?= rol dword ptr , 1?
D0 04 00? ?= rol byte ptr , 1?
D2 04 00? ?= rol byte ptr , cl?
C0 6C 5C 00 00? ?= shr byte ptr , 00?

lala there is ur SIB :)

if instruction can use mem than it can probably use SIB

The Svin:
Nice macro there!, i also coded one "PushR" thread in the sourcecode&algorithms section,
you can just type: pushr eax,ecx,edx / pushr eax / pushr edi,eax
urs is just smaller, by sending binary form :)
Posted on 2003-06-30 12:11:07 by wizzra
SIB can be in any instruction wich allows to specify
operand in memory.
If it does - then modr/m is present, and if it present
then its field r/m can be extended to SIB.
SIB is an extention of r/m field.
Posted on 2003-06-30 14:47:21 by The Svin
hi all......great work...keep it up......i thankez...gud work....good luck. :)
Posted on 2003-07-05 06:47:55 by crappi
Hi The-Svin,
i am wonder about something,

Opcodes:

8FC0 - 8FC7 | pop <reg> : Valid instructions to execute.
8FC8 - 8FFF | pop <reg> : seems they are Illigal Instructions to execute

why would the second set wont be lligal ? they do pop <reg>...
could be the bit mixes are so that the cpu wont allow it to execute ?


8FC8:
MemWord 10001111oo000mmm 8086 Pop a Word from the Stack

10001111 [10] [101] [000]

is 101 the invalid part?
Posted on 2003-07-06 11:28:30 by wizzra
8F /0 POP r/m16 Pop top of stack into m16; increment stack pointer
8F /0 POP r/m32 Pop top of stack into m32; increment stack pointer

Yes you are correct. the 101 part should be 000 instead (Since there are no other opcodes with 8Fh).
Posted on 2003-07-06 12:36:36 by roticv
Since there are no other opcodes with 8Fh

ofcourse there are more opcode with 8F, there are 6400 diffrent instructions with 8Fxxxx... (pop) alone :)
only the last ones are invalid
Posted on 2003-07-06 13:33:44 by wizzra
..

I mean ... that the for the modr/m the 1st reg have to be /0 if not the opcode would be invalid. Sure there would be 6400+ opcodes for pop if you include sib and so on. The last one is invalid cause the bit 3-5 have to be 0.
Posted on 2003-07-06 17:58:03 by roticv
wizzra,
You must analyse code in bynary not in
hex. Fields are not always multiple by 4,
thus it's difficult to understand it in hex.
For example in your case 8F1X also invalid.
(by X I mean "ANY" hex digit)
There is format for pop opcode.


code block modr/m block [possible sib and displacemnt]

10001111 + mm 000 r/m + (xxxxxx.....)


Middle field of modr/m block (so to called "reg or code field)
should have only zeroes.
Pop insruction has the only operand, thus
there is no need for middle field - any
operand can be specifyed in "r/m" field and
its extention - sib (if needed).
So roticv was right, but failed to explain his
point to you, cause you kept thinking about
your 8FC8 - 8FFF hex range. And his was saying
about 000 in middle bits field.
For example 8F10 is alsow invalid though it is
out of range of your 8FC8 - 8FFF.
Posted on 2003-07-06 18:44:04 by The Svin
The Svin,
hi, i was refering for 0xC8-0xFF as an example for the pop <reg> only, i know there are sib..etc so i wasn't refering to them,
it is easier to understand why invalid instructions by examining the pop <reg> first than applying it to the modr/m ones.
so than i now know what the instruction must have 000 in reg1 to be valid.
thnx =) :alright:
Posted on 2003-07-07 02:09:01 by wizzra
I found a bug in one app.
Or in mnemonic was as 0r.
It made impossiple to decode mnemonic
it test section with or correctly.
Here is a fix.
Posted on 2003-07-23 14:16:34 by The Svin
you know,
we have been talking about opcodes decoding, the way it has been encoded and a proper ways of decoding, it is all facinating here in the ring3 enviorment :D but we haven't really talked / understand HOW CPU really does those jobs,
yeah he gets binary code block, but still, he sees 5v and 0v..how it really decodes it? how would it really perform an instruction based on electric pulses..it sounds facinating, though i am not a electronic man, microprocessors is really interesting .
so, is there a good way to explain the the cpu really does it? or it is now more likely an 'go learn 5 years electronics and u will somehow understand?'
thnx :)
Posted on 2003-07-27 16:53:13 by wizzra
People asked me for sources
Here is first
Posted on 2003-07-28 03:16:22 by The Svin
you know,
we have been talking about opcodes decoding, the way it has been encoded and a proper ways of decoding, it is all facinating here in the ring3 enviorment :D but we haven't really talked / understand HOW CPU really does those jobs,
yeah he gets binary code block, but still, he sees 5v and 0v..how it really decodes it? how would it really perform an instruction based on electric pulses..it sounds facinating, though i am not a electronic man, microprocessors is really interesting .
so, is there a good way to explain the the cpu really does it? or it is now more likely an 'go learn 5 years electronics and u will somehow understand?'
thnx


Gates. It's all gates. Lots and lots and lots of gates... no, not Bill :)

If you really want to know:

http://www.amazon.com/exec/obidos/tg/detail/-/0672210355/102-1846967-5263343?vi=glance

Don Lancaster's TTL Cookbook is very readable, doesn't demand transistor level knowledge in order
to comprehend, and... well, far as I'm concerned, any coder would be that much further ahead, knowing
a little about digital electronics. It's uhh... well, only logical.

Came in real handy when I needed a particular function that my little programmable calculator was
mising. It does have basic boolean functions, though, so:

Not (Not (A and Not B) and Not (B and Not A))

was just the ticket :)

All joking aside (and, yes, I expect you to work the above equation :) ), I highly recommend Don's
book.

Jeff
Posted on 2003-07-28 03:16:42 by jayte
@The Svin: Thanks 4 the sources :alright:

cya
CuTedEvil
Posted on 2003-07-28 12:18:36 by CuTedEvil
...Came in real handy when I needed a particular function that my little programmable calculator was
mising. It does have basic boolean functions, though, so:

Not (Not (A and Not B) and Not (B and Not A))

was just the ticket...


Ok then. So, if we work this... something like:

temp1 = Not (A and Not B)
temp2 = Not (B and Not A)
result = Not (temp1 and temp2)

Which, if my calculator would've had the function, could be written much more simply as:

xor A, B

Jeff
Posted on 2003-08-01 01:43:10 by jayte
Modr/m in 16 bit mod logic.
Next educational app.
Artical will be included later.
Posted on 2003-08-05 02:25:36 by The Svin