I put a thread in the gaming forum, that has no answers, which is fine. I found my my real problem is that MASM flags:

div eax,ecx

as an error ML Nonfatal Error A2008

It is says that the , is an error.

I was able to code it with hex(like a real man)

db 0f7h,0f1h

What am I doing wrong(or what is wrong with MASM?

Thanks.

edit: just figured it out. I dont use div at all really.

div ecx

Is what I want. I got confused because the dissassembly shows div eax,ecx.

div eax,ecx

as an error ML Nonfatal Error A2008

It is says that the , is an error.

I was able to code it with hex(like a real man)

db 0f7h,0f1h

What am I doing wrong(or what is wrong with MASM?

Thanks.

edit: just figured it out. I dont use div at all really.

div ecx

Is what I want. I got confused because the dissassembly shows div eax,ecx.

And did you make sure edx was set to zero before the divide?

div ecx

DIV - Divide

Usage: DIV src

Modifies flags: (AF,CF,OF,PF,SF,ZF undefined)

Unsigned binary division of accumulator by source. If the source

divisor is a byte value then AX is divided by "src" and the quotient

is placed in AL and the remainder in AH. If source operand is a word

value, then DX:AX is divided by "src" and the quotient is stored in AX

and the remainder in DX.

Clocks Size

Operands 808x 286 386 486 Bytes

reg8 80-90 14 14 16 2

reg16 144-162 22 22 24 2

reg32 - - 38 40 2

mem8 (86-96)+EA 17 17 16 2-4

mem16 (150-168)+EA 25 25 24 2-4 (W88=158-176+EA)

mem32 - - 41 40 2-4

F6 /6 DIV r/m8 Unsigned divide AX by r/m8

F7 /6 DIV r/m16 Unsigned divide DX:AX by r/m16; AX

F7 /6 DIV r/m32 Unsigned divide EDX:EAX by r/m32 doubleword

Usage: DIV src

Modifies flags: (AF,CF,OF,PF,SF,ZF undefined)

Unsigned binary division of accumulator by source. If the source

divisor is a byte value then AX is divided by "src" and the quotient

is placed in AL and the remainder in AH. If source operand is a word

value, then DX:AX is divided by "src" and the quotient is stored in AX

and the remainder in DX.

Clocks Size

Operands 808x 286 386 486 Bytes

reg8 80-90 14 14 16 2

reg16 144-162 22 22 24 2

reg32 - - 38 40 2

mem8 (86-96)+EA 17 17 16 2-4

mem16 (150-168)+EA 25 25 24 2-4 (W88=158-176+EA)

mem32 - - 41 40 2-4

F6 /6 DIV r/m8 Unsigned divide AX by r/m8

F7 /6 DIV r/m16 Unsigned divide DX:AX by r/m16; AX

F7 /6 DIV r/m32 Unsigned divide EDX:EAX by r/m32 doubleword

With the DIV instruction it is assumed that in EAX is the divisor and the register that you specify is the dividend. with idiv you can use specify both registers but that is a signed divide which is more costly in terms of clk cycles.

And like sluggy said, always remember: clear edx when doing 32-bit division.

More than a few bugs of mine came up this way.

More than a few bugs of mine came up this way.

Yes edx was cleared.

It was just a syntax problem. MASM assumes eax(correctly), so you can't include it. I'm curious if FASM syntax is the same?

div ecx or div eax,ecx ?

Thanks.

It was just a syntax problem. MASM assumes eax(correctly), so you can't include it. I'm curious if FASM syntax is the same?

div ecx or div eax,ecx ?

Thanks.

hrm, which disassembly engine showed "div eax, ecx"?

VC7 debugger

interesting.

v6 too, oh and olly too i think!

Nay, not ollydbg

```
```

00403CD4 F7F1 DIV ECX