What does this mean? Voltage Reference ?
Also I have a 7905, which is a negative 5V voltagre regulator?Is the only difference the polarity?
Posted on 2003-05-08 18:08:30 by x86asm
If i remember correctly, the reference voltage is the maximum voltage the analog signal is to be ratioed to.

And yes only the sign is different.. give it -10V (with respect to ground), and it would provide -5 V output (with respect to ground).

How to you get -10V? A center-tapped transformer and some capasitor will help your out ;)

:NaN:
Posted on 2003-05-08 18:52:45 by NaN
You should read the datasheet for you DAC. You'll need to know what voltages are valid. Some DAC's, like the DAC8841, take a Vin and multiply it, then scale it by what you set that output to.

If you don't have a negative supply handly, you can get a voltage inverter. http://www.linear.com/pdf/Inverters.PDF
Posted on 2003-05-09 02:53:00 by eet_1024
Hi, x86asm,

The reference for a DAC will give you the maximum output voltage or current (depending on DAC type). Vout=Vref*(2^n - 1)/2^n, where n is the number of bits.
For example, for an 8-bit voltage output DAC, with a 5V reference, the maximum output voltage (ideal) would be: Vout= Vref*(255/256).
That is 4.98V.

As for the negative voltage, take a look at the attachment. I don't know how to insert pictures yet. Maybe somebody will help me.

In the first circuit, you need to use fairly large caps (100's of uF, depending on your power requirements), since you have half-wave rectifiers only. But it works very well.

The second circuit creates a virtual ground for your circuit, in case you only have DC available. The two resistors are in the 10's of kohms range. If they are equal, your voltages will be equal, of opposite sign. For a LM324 opamp, DC IN should be below 30V.
Be very careful with the transistors. Their maximum current rating has to be higher than what your circuit needs. They most likely will need heatsinks. If necessary you can use Darlingtons. Note that your DC input has no connection to your new "ground".

There are other possibilities, too. A 555 can also be used as a negative voltage converter.
Let me know if you need other ideas.

Good luck!
Posted on 2003-05-09 11:56:47 by VVV
Originally posted by VVV
As for the negative voltage, take a look at the attachment. I don't know how to insert pictures yet. Maybe somebody will help me.


To add images, you simply upload them like your would a zip.
"Valid file extensions: gif jpg png txt zip bmp jpeg asm gz inc"

PS: I like the Op-Amp circuit ;) Its clever... what other tricks do you have?

:alright:
NaN
Posted on 2003-05-09 20:08:03 by NaN
Hi, Nan,

Thanks for the explanation. I will give it a try.
The opamp circuit is not my idea, so I cannot take credit for it. I have seen it working, though.

Best regards,
Posted on 2003-05-09 20:21:16 by VVV
I once wrote here on the subject of DACs. The perfect DAC is one the attached image ;). You will have output 0% to 100% of the reference voltage, which, in this case, is the supply of the CMOS buffers.
out= DigitalValue * VCC / (n^2 -1).
Thus, in a 4-bit dac, value of 1111b will output 100% VCC. Verify each value, if you don't believe me ;). Absolutely linear conversion.
Only CMOS buffers will do the work.
Posted on 2003-05-11 02:40:12 by Ultrano
Have you actually gotten that circuit to work?

I have a few problems with it, but I may be overlooking something (please correct me here if im wrong ~ its happens alot i find ;) ).

In short, I believe you want to have an inverting amplifier on the output here (not a buffer):

It appears to be a current summing ciruit (which is in the correct vain of though for what your doing), but there isnt anywhere for current to flow.

The op-amp is configured as a buffer (neg = out, pos = in), with an output load of a resistor and a capasitor.

On the positive side you have a binary valued resistors in parrallel. Through Ohms law you get binary currents from a common source (assumed +5V / high bit) which is also correct. But the problem i have is that this current can not flow into the op-amp. The ideal op-amp recieved zero curent in its +/- terminals. In reality is in the order of pico-Amps. Op-amps are not made to drive outputs based on the value of the leakage current entering it.


Other possible concerns is that the capasitor on the output will make transitions look smooth (instead of a stair like ramp), but it will also limit you to a maximum frequency, based on the output resistance of the op-amp. However, for sound DAC this may not be much problem at all, and may be a good thing if the capasitor is sized correctly.

Another point i learnt from my experiences is that resistances over 100K Ohms tend pick up noise very easily in such circuits (back ground noice from radio waves/emi). This will get buffered and appear in your output signal. I would try to keep your resistances smaller, and hence the resulting currents larger (to drown out any 'noise' currents). Perhpas this is the intention of the output capasitor? If made small enough it would shunt higher frequencies to ground?

Here is a replacement op-amp cct for this. It Doesnt fix resistance concerns tho (Note: open 'switches' are ground, and closed 'switches' are your bit voltage value)


However, to get around the higher resistance isues i talked about there is an alternate method for this style of DAC. Its often called the R/2R DAC Ladder. In principal it used only two types of resistnaces R and two times R (2R). You can choose R to be anything (say 10k and 20k).



In either cases it wise to buffer your output bits (as Ultrano has indicated). This is to protect your cpu from sourcing or sinking too much power (due to current draw/sink at 5 V). The chips on the ports may not handle the maximum draw by them selves.

For other reading, i found this link that is kinda interesting:

http://www.mines.edu/Academic/courses/physics/phgn317/lect10/sld005.htm

:alright:
NaN
Posted on 2003-05-11 10:08:40 by NaN
Here is another interesting variant.. I have never seen this before.. but i see how it would work.. (would use alot of transitors for higher bit orders)



:alright:
NaN
Posted on 2003-05-11 10:12:55 by NaN
Dude, you really forgot CMOS elements. The schematic I posted is perfect. When the output of the CMOS buffer is 1, it connects the resistor to VCC. When it's 0, the resistor is connected to GND. Now, take a simple 4-bit DAC. Take the value 0011b.

the 20k and 40k get connected to ground, 80k and 160k - to VCC.
Rx1= 20k || 40k ( connected in parallel ) = 13.3(3)
Rx2= 80k || 160k = 53.3(3)
output= VCC * Rx2 / (Rx1 + Rx2) = 0.2 * VCC = VCC * 3 / (2^4 - 1)

heh :) see it's perfect?
I made this schematic myself, haven't seen it used anywhere, but it's damn perfect and easy-to-make !!
The buffer after the 4 resistors should have high input impedance, best to use is TL062 or better.


As I created this schematic for a digital radio receiver of mine, the processed signal needs to be lowpassed with that RC circuit (I guess I forgot the diode :grin: )
the RC output elements can be removed.
I know about the resistors with high values - I have had problems with them :).
So, I 'invented' another schematic, for bypassing this. On that schematic, for every 8 bits, there is a separate DAC, the least-significant ones have 255-times lower output, setup with resistor voltage divider. There are 2 or more ways to make the final sum, one is with resistors directly (all DACs share the lower resistor of the voltage divider), the other is grouping DAC outputs by 2, like in an Mortal Kombat tournament :), and summing them with OpAmps.
Posted on 2003-05-11 12:43:32 by Ultrano
Ultrano,
Good job! I believe you have a minor mistake in your explanation in that output= VCC * Rx2 / (Rx1 + Rx2) = 0.2 * VCC should be output= VCC * Rx1 / (Rx1 + Rx2) = 0.2 * VCC. Your problems with high resistors were probably caused by the input bias current of the op amp setting up an offset voltage when it passes thru the input resistors. Lower value input resistors or compensation should help you there. I like the voltage follower configuration of the op amp whose high input impedance assures isolation for the CMOSes, and a hefty current drive and unity voltage gain for the output. Ratch
Posted on 2003-05-11 14:52:50 by Ratch
Thanks Ultrano,

Obviously, its the first I've seen such a circuit. I did a quick check before i posted, thinking perhaps you were trying to source and sink current from the same chip. My quick math : [ 80 || 40 || 20 ] / ( [ 80 || 40 || 20] + 160 ] ) * 5V = 0.333333

I was expecting something like 0.125 so i quickly disregarded this as a posible explaination of this circuit. I appologize, this was my error here :rolleyes: , i should have confirmed my expectation first, i simply thought it was too high.

:alright:
NaN
Posted on 2003-05-11 21:14:59 by NaN
Before you go and call any circuit 'perfect,' ...

Well, there ain't no such thing. A circuit may be suitable for some application or not, it is never perfect.

Here we have a 4 bit digital to analog converter. Its very dependent on the CMOS being negligably loaded, that demands large resistors to start, and limits the extensability. With 7 bits, your already using resistors over a meg.

It is also extremely dependent on VCC, in fact, its a one to one ratio. That means power rail noise too.

CMOS doesn't have a perfect square transfer function either, there is some grey area as to what ONE or ZERO mean. A legit one just barely in spec will not drive the output to full VCC, and I'd hate to try to calculate that error.

If it does the job for you at a price that makes the product affordable, then use it.

If not, keep trying.
Posted on 2003-05-11 21:57:42 by Ernie
Ernie , you're right :alright:
no such thing as perfect. Thus, I've aliased "almost perfect" and "the best I've thought of" as "perfect" :)

I had the large-resistor problem with some other schematic, with bipolar transistors. And I used this DAC for sound, where the constant voltage error of OpAmps is filtered.

Ratch: thanks :). Also, the "255" should be "256". I guess I was very tired when I was writing. :grin:

Anyway, I gave up electronics 3 years ago.
Posted on 2003-05-12 00:42:37 by Ultrano
You might consider using FET's for switching.

Resistors are excellent noise generators; the energy comes from the surrounding heat (including room temperature).
Posted on 2003-05-12 01:22:32 by eet_1024
nah, it's impossible to find any here. The only FET I ever found here, was very expensive $1 or $2, I bought it , and burnt it with static electricity . I loved to use some nice Bulgarian transistors, with beta >600, that cost 2 cents. 2T3604, as far as I remember. // technology from 1970 is all I can find here...

there are some cool resistors, 0.1% noise only . or was it 0.01. My latest reference book is from 1983 :grin: :stupid:
Posted on 2003-05-12 03:34:58 by Ultrano
Hi, everyone,

Ultrano, I don't mean to disappoint you, but about 15 years ago I played with circuits like these and eventually I understood they are not perfect.

Whenever I deal with DAC's and ADC's, I look at three points: zero, half scale, full scale.

In your circuit the zero is OK.
Full scale is Vout=Vref. It should be Vout=Vref*15/16. You can argue this was your intention, but the 1111b code is 15 decimal, so the output should be Vref*15/16. ( Vout=Vref*(2^n-1) )

At half scale, you have one 20K resistor feeding the summing node, while the other three are in parallel to ground ( for code 1000b).
The DAC should produce Vref/2, right? (Either way you look at it, 1000b is 8, so the output should be Vout=Vref*8/16, that is half).
That means the three resistors in parallel to ground should equal 20K. In your circuit they equal 22.857K (40K || 80K || 160K).
As you can see, the half scale is not "perfect", not even in theory. If you plot the response of your circuit and compare it with an ideal output, you will see it exhibits a curvature, called integral nonllinearity, as well as a full-scale error, called gain error.

NaN's first impulse was correct. The summing opamp will keep the voltage at its inverting input close to 0, so the currents in the binary weighted resistors are independent from the voltages at the other inputs.

Another problem with your approach is that the higher the number of bits, the higher the resistor for LSB becomes. Using your example, with 20K for R1, for a 12-bit DAC, the last resistor would be 40.096Meg. Not very practical.

Therefore, the circuits most often used are the R-2R ladder network and the equal resistor string. That allows you to select the value for R and the highest resistor value you need is 2R. It also makes it easy to select and match resistors: you only need to values. They also guarantee the output is monotonic, that is the output always increases/ decreases when the code is incremented/ decremented. It's easy to see tha for the resistor string. Even if the resistors do not have the exact value, the output increases when the input code is incremented, decreases when the input code is decremented.
The difference that can exist between the ideal increase/ decrease and the actual one (due to unequal resistors) is another parameter, called differential nonlinearity.

Please don't take this personally. I thought I'd post this for the sake of correctness.
I sometimes use circuits similar to yours, whenever precision is not a real issue.

All the best!
Posted on 2003-05-12 12:09:45 by VVV
corrections are always welcome :alright:

as I said, I created this DAC in order to make a digital radio receiver. In fact, a complete radio phone. Its measurements are 90 x 37 x 17 mm. In it, there are: antenna, a DataBank electronic watch (a very cheap electronic scheduler and telephone book), receiver, 2 Xtals, this DAC, a 4046 as a digital encoder, a schematic for pulse telephone dialing (UM91611), 2 tone generators, microphone and speaker amplifiers ( I used an x-tal for speaker, it sounds well), oscillator, AM modulator, HF amplifier, output LC. Ah, and a logic block. All this in one small toy-GSM-case. That xtal speaker makes useless big and complicated DACs ;) .
I made about 20 schematics and 12 pcb boards until I put everything in harmony.
My next goal was to make more such devices, and build a small network for my friends. But had no time to make it - bodybuilding and school took all time. Later, I got a PC, and it gives me better chances of success in life, so I must stay concentrated in x86 coding.

There is absolutely no theory that a DAC must produce max output of (2^n-1)/(2^n) !!! People just got used to having such results by all DACs, and have given up making max_out=vcc. And presenting this DAC, it shocks you mostly because of it doesn't follow this standard. But I don't think its' a reason someone to claim the schematic wrong or anything :). With 1000b you will get 8/15. But it all depends on the designer's needs ;) .
About getting 40MOhm resistors: I told the solution :).
anyway
thanks for correction and clearing up pros and cons of the DAC :alright:
Posted on 2003-05-12 13:01:26 by Ultrano
Ultrano,

I have to backtrack a little from what I said.
Your circuit is, in fact, linear as long as there is no significant loading of the summing junction.
As for errors, it only has a 1LSB gain error, which can easily be corrected (we are talking about errors due to principle, not due to actual implementation). That accounts for the full scale being equal to the reference.

I am glad you did not misunderstand me.

Thanks,
Posted on 2003-05-13 11:16:29 by VVV