Does FASM understand mov reg32,trX?
Posted on 2003-08-05 05:02:32 by The Svin
trX? Task Regiser? Trap Register? (can't find any mneomic in my opcde ref for mov r32, trX)
Don't you mean drX (Debug Register X)
Posted on 2003-08-05 06:30:34 by scientica
Test Registers
For example
0F 26 F0
mov tr6,eax
Posted on 2003-08-05 07:03:29 by The Svin
Ok, I had to search the Intel reference (IA32 SW Dev Manual Vol 2) for test before I foud this:
T The reg field of the ModR/M byte selects a test register (for example, MOV

And that's about what I find, do you know where I can find some more details about these registers? (I haven't head of them, not that I can recall)
Posted on 2003-08-05 07:14:15 by scientica
Test registers are no longer supported by Intel (only valid on 80486).
See page 18-25, paragraph 18.20, Volume 3.
Posted on 2003-08-05 07:21:10 by bitRAKE
Thanks BitRake, I had forgotten to download the third volume :o
The implementation of test registers on the Intel486 processor used for testing the cache and
TLB has been redesigned using MSRs on the P6 family and Pentium processors. (Note that
MSRs used for this function are different on the P6 family and Pentium processors.) The MOV
to and from test register instructions generate invalid-opcode exceptions (#UD) on the P6 family
Posted on 2003-08-05 07:30:41 by scientica
So what about FASM?
Can I encode here mnemonics with trx?
Posted on 2003-08-05 07:41:15 by The Svin
Doesn't appear so: :/
flat assembler  version 1.48

t1.asm [8]:
mov tr6,eax
error: invalid operand.
Posted on 2003-08-05 07:59:15 by scientica
Yes, I didn't sypport these opcodes initially, because I've designed the first fasm versions for the Pentium architecture, and there TRx's are not supported. But since I'm now supporting many old instructions (like loadall286 and loadall386), I can implement it, too. I'll think about it for the next version.
Posted on 2003-08-11 10:13:19 by Tomasz Grysztar