hi, i was wondering why logic voltage is +5V, some years ago, there is +3,3V, and lately there is 1,8V. is there any special thing with those number?

one related issue again. in case i dont have any multitester /voltmeter, how can i know if a voltage is 5V? is there any chemist standard /whatever?

Posted on 2003-09-23 07:08:26 by dion
they're in fact the best operating voltage for each type of IC - 5V for TTL, and the others are for microprocessors. There was some schematic for showing voltage with LEDs. Maybe you can make your own digital voltmeter - one OpAmp (will be comparator), RC oscillator , counter, decimal decoder+LED indicators.
Posted on 2003-09-23 20:57:56 by Ultrano
no, i mean something like one i heard in chemist knowledge. i.e. clock use atomic clock as a very reliable source. is there?
Posted on 2003-09-25 05:44:22 by dion
First of all, Dion are you a girl? Anyway dern, you can get a multimeter for about 7 bucks at Radio Shack. Do you have them there? I bet you do. But yeah you could use temperature across a resistor for a power rating. As a physical measurement. A multi-meter uses a voltage divider network to detect various voltage levels. Wheatstone bridge circuit is good if you have D-arsonval or magnetic vain meter. A to D converter such as in a Thermometer circuit. Me, I prefer Beckman or Fluke. Oh yeah the treashold question. TTL was silicon transistors. CMOS switches at lower voltage 3.3 and the 1.7 I beleive is some kind of enhanced CMOS. Probably a different doping material.
Posted on 2003-09-25 06:51:14 by mrgone
am i a girl? no way :grin:
my avatar was accidentally taken from arcade forums somewhere.

nah, assume that you are in a jungle and dont have any electronic instrument/device. what will you do to measure something, i.e a disposed battery you found somewhere in a garbage.
Posted on 2003-09-25 07:21:42 by dion
My black freinds say I have electricity. Bet I could give you a good idea even considering that the max voltage may be displayed on a DVM even when the juice is about gone. Voltage is the potential but it is the amps that kill you. Amps are rated at so many electrons moving past a given point. 1x10 to the 128th "I don't remember"
Posted on 2003-09-25 11:04:05 by mrgone
Amps or current ("str?m" in swedish), is defined in my physics book as (the definitons are written in both english and swedish (guess it's akind of i18n) - so I simply quote the english version)
Electric current in a conductor is the rate of flow of electric charges throught a cross section of the conductor.

I = Q/t
Unit: 1 A = 1 C/s

Where Q is the charge (measured in Coulombs), t the time (in seconds) it took for the charge Q to pass througt the cross section.
Posted on 2003-09-25 11:32:45 by scientica
I knew someone would know.
Posted on 2003-09-25 11:53:58 by mrgone

no, i mean something like one i heard in chemist knowledge. i.e. clock use atomic clock as a very reliable source. is there?

What does chemistry have to do with the logic level values of a semiconductor logic family?

An atomic clock is not inherently very RELIABLE because it is complicated and requires lots technical maintenance for the ancillary equipment needed to support it. It is tolerated because it has an extreme high degree of ACCURACY. A sundial is an extremely RELIABLE clock when the sun shines, but it lacks ACCURACY. Ratch
Posted on 2003-09-25 20:50:32 by Ratch
Ratch, i dont mean to say like that. anyway, scientica has show some way :)
Posted on 2003-09-26 07:53:16 by dion
The 5V voltage comes from the old TTL circuits, which were bipolar.
As far as I know it was chosen low enough, just below the breakdown voltage of the B-E junctions of the bipolars. But it had to be high enough to be able to drive the transistors on (all those B-E voltages add up and transistors have limited gain), guaranteeing a min of just 2.4V for a HIGH, when fully loaded.
The resulting TTL levels provided reasonable noise margin.

With CMOS devices, it was possible to reduce the supply voltages. No current gain is involved, the transistors can drive the output from "rail to rail".
The trend of reducing voltages continues because the power consumption decreases with lower voltages. The power consumption is dictated by the capacitances that have to be charged up/ discharged. The higher the voltage and the operating frequency, the higher the power consumption. Thus, you will see the voltage drop to lower and lower levels as the operating frequency increases.

In many modern microprocessors, the core is running at 1.8 or 1.5V or 1.2V (maybe even lower) and the I/O interface at 3.3V, to provide compatibility with the 3.3V devices in the circuit. This is done because the core runs at the highest frequency, so this is where most of the power is consumed, hence the voltage of the core is reduced to shave off the biggest chunk of power.
Posted on 2003-09-29 12:02:22 by VVV
Hey guys,

After all these years I just had this thought. If TTL is driven by 5V, Why is CMOS, which devices require lower levels, usually driven by 12V?

It's been too long for me to even think about it clearly, maybe some of you younger people can explain?
Posted on 2003-09-30 09:43:47 by djinn
But you ever heard of a voltage regulator. I can run CMOS on two "AA" batteries
Posted on 2003-09-30 10:10:28 by mrgone
Hi, djinn,

In TTL (bipolar) circuits, the transistors are turned on by resistors. The limited gain of the transistors requires fairly large currents. These are produced by resistors in the base circuits of the transistors. Therefore, the currents vary with the supply voltage, so the supply voltage has to be rather tightly controlled, or else the transistors can get out of saturation if Vcc is too low, or the dissipation in the base resistors increases too much if Vcc is too high.

CMOS circuits will tolerate larger voltage variations, because the MOSFETS are voltage controlled devices and the G-S voltage can be increased significantly without danger. The transistor becomes fully enhanced at , say, 3V, but it will not break down for voltages as high as 20V. Once fully enhanced, the variation of the G-S voltage has no significant effect, the transistor stays on. Gate currents are extremely low, so there is almost no dissipation statically.

Generally you will use high supply voltages to increase the noise margin. For example, typical 4000 CMOS series thresholds are 33% of Vcc for the "0" and 66% of Vcc for the "1". Thus, at 12V any voltage less than 4V is still a "0", while any voltage above 8V is a "1". This means you have a noise margin of 4V.
When used at 5V, a "0" must be less than 1.65V, and a "1" must be higher than 3.3V. So the noise margin is now 1.65V.
This is still much better than the TTL's, where you only have 0.8V noise margin for the "0". The noise margin for TTL's is actually further reduced, since the output does not swing from ground to Vcc. The guaranteed max for a "0" is 0.4V. So the noise margin is only 0.8-0.4=0.4V. Similarly, for the "1", the guaranteed minimum for the output is 2.4V and a guaranteed maximum for the input is 2.0V. Again, the noise margin is 2.4-2.0=0.4V.

Hope this helps refresh your memory on a few things.
Posted on 2003-09-30 11:55:16 by VVV
Also, the higher the voltage of the CMOS, the higher its maximum frequency. All variations of MOS have slightly different Ucc/MHz relation graph, but they all point that out - it's good to have high voltage . At 12V, I think there was a point from which on the current consumption became too bad/impractical.
Posted on 2003-09-30 13:49:36 by Ultrano