In a multithreaded program on Intel Hyperthreading with separate threads processing data in MMX, does each logical processor have virtuall access to all 8 mmx registers independent of the other processes like it does with the general purpose registers?

Or are there only 8MMX registers to share among all processors?

Posted on 2005-03-23 00:12:18 by V Coder
From Intel's famous "IA-32 Intel? Architecture Software Developer?s Manual"

Hyper-Threading Technology
Hyper-Threading (HT) Technology was developed to improve the performance of IA-32 processors when executing multi-threaded operating system and application code or single-threaded applications under multi-tasking environments. The technology enables a single physical processor to execute two or more separate code streams (threads) concurrently. Architecturally, an IA-32 processor that supports HT Technology consists of two or more logical processors, each of which has its own IA-32 architectural state. Each logical processor consists of a full set of IA-32 data registers, segment registers, control registers, debug registers and most of the MSRs. Each also has its own advanced programmable interrupt controller (APIC).
Posted on 2005-03-23 03:03:36 by ti_mo_n