Experts, please help..

I'm trying to calculate some memory latency.

basically I'm looking for ways to serialize memory access in a loop.

char storage;
int dummy;
for (i=0; i<max; i++)
{
dummy = storage;
}

Say in one iteration that storage missed in processor cache, the processor could start fetching storage. Is there a way I can stall the processor when there is a cache miss? so the processor would not create another memory access for the next iterations. I only want one memory access at a time.

Is there any special instruction asm I can use to stall the processor like that? This program is running on Xeon IA32 system.

Any clue?
Posted on 2005-04-15 01:53:56 by Chanus
If you are stuck with a compiler's output you are probably in trouble but if you can get the code into an assembler format, you could try controlling the block size you need to work on and try the various "prefetch" strategies that are available in PIV hardware.

If you know your way around SSE(2) instructions, you can distinguish between temporal and non-temporal read and writes to memory to avoid cache pollution but its going to have a lot to do with what you want to do with the code.
Posted on 2005-04-15 02:24:15 by hutch--