hello all and merry christmas  :D

here is an informative post about RTDSC found on Intel's forum :

http://softwareforums.intel.com/ISN/Community/en-US/forums/thread/30226599.aspx
Posted on 2006-12-29 14:20:42 by Dr. Manhattan
Hmm, could someone test this code on an Intel cpu? 70 cycles for RDTSC is strange.

mov ebx,2
@@:
rdtsc
mov ecx,eax
rdtsc
sub eax,ecx
dec ebx
jnz @B
PrintDec eax

I can only test it on AMD cpus, and the result is "eax = 5"
Posted on 2006-12-29 17:04:21 by Ultrano

Hmm, could someone test this code on an Intel cpu? 70 cycles for RDTSC is strange.

mov ebx,2
@@:
rdtsc
mov ecx,eax
rdtsc
sub eax,ecx
dec ebx
jnz @B
PrintDec eax

I can only test it on AMD cpus, and the result is "eax = 5"


Hi, Ultrano,

on an Athlon XP 2800+ eax=11

Regards...

Deej
Posted on 2006-12-30 15:27:55 by phinger
Modifying the code to:
      mov ecx,1
      rdtsc
      mov ebx,eax
  @@:
      dec  ecx
      jnz @B
      rdtsc
      sub  eax,ebx


I got the following results on my new computer (which has an Intel dual core 1.86GHz processor) when modifying the value of ECX:

 ECX   EAX
  1    63
  10    133
100    224
1000  1127


Raymond
Posted on 2006-12-30 20:48:38 by Raymond
^^"  the test was actually to measure how many cycles rdtsc takes, not a loop :) . I was curious, since it's a bit ironic to not have seen public info on this timer-instruction's timing.

I guess 58 in the case of your cpu, 4 on my Sempron3000+ (amd64 supported), and 10 on AthlonXP2800+ .
Posted on 2006-12-30 22:22:58 by Ultrano
The timing of that instruction is kind of unusual. If I test the following code, I get 126 in EAX, indicating that each of two RDTSC instructions takes about 62 clocks.

      rdtsc
      mov ebx,eax
      rdtsc
      rdtsc
      sub  eax,ebx


With my previous "loop" code, the instructions within the loop take regularly 1 clock if the loop is repeated at least 10 times and 124 is subtracted from the final content of EAX. However, if the loop is repeated fewer times, the content of EAX would be as follows:

1   63
2  77
3  91
4  119
5  126


The seemingly partial overlap of the RDTSC instructions is intriguing.

Raymond
Posted on 2006-12-31 19:46:29 by Raymond
Interesting :) . Could it be an intentionally-kept inconvenience, that would push developers into getting a $699 VTune :P ? j/k .
But the deviations of 5%-30% on that post on intel's forum... wow. I already get all nervous when getting even only 1% deviation, trying to decide on versions of implementations ^^"
Posted on 2006-12-31 20:07:01 by Ultrano