But I have not used it before.

Anyone used the MMX regs as extra registers when the others run out?

How about to store a commonly used constant in a reg?

The Agner file says all instruction take 1 cycle(cept mul), so thier should no perforamnce penalty?

emms is the exit code, is there an entry code. My search of the board suggests no.

Anyone know where I can get the intel PDF?? I looking at their site now, but no luck. How bout SSE?

Thanks. Thats enough dumb MMX questions for now.
Posted on 2002-01-15 20:01:08 by ThoughtCriminal
http://ulita.ms.mff.cuni.cz/pub/techdoc/

It's in volume one. Chapter 8 in my books, but they might have moved them around since 1997. I know on the AMD chips you don't really have to do emms. ;) I switch back and forth with no problems. I haven't timed it - to see if there is a penalty for using FPU and MMX at the same time. Should be able to use a movd for temp storage with MMX regs, or better yet try to use MMX in part of the algo - especially the load/store from/to memory if they are aligned. It's amazing what can be done with only a few instructions. Since Thomas' work I've been trying to code a neural net in MMX - the hardest part is designing a custom back propagation algo for the training. I'm begining to think I should try some genetic algorithms. The speed advantage should be HUGE! Very large neural nets that are superfast.
Posted on 2002-01-15 21:48:30 by bitRAKE
Very intersting.. good idea for a study topic indeed!
Good Luck!

:alright:
NaN
Posted on 2002-01-15 22:20:20 by NaN
Thanks. But if you want to include in your algo, remember, the MMX regs are DATA only!! What kind of alighnt ment is good 4byte boundary?
Posted on 2002-01-15 22:41:11 by ThoughtCriminal
What do you mean they are DATA only? You can't move immediate data into MMX regs, but you can move from reg32 into lower dword of MMX reg (movd instruction). By habit I align on the data size - 8 bytes, but I'd have to look it up to find the text book answer. ;)
Posted on 2002-01-16 00:54:55 by bitRAKE

http://ulita.ms.mff.cuni.cz/pub/techdoc/

It's in volume one. Chapter 8 in my books, but they might have moved them around since 1997. I know on the AMD chips you don't really have to do emms. ;) I switch back and forth with no problems. I haven't timed it - to see if there is a penalty for using FPU and MMX at the same time. Should be able to use a movd for temp storage with MMX regs, or better yet try to use MMX in part of the algo - especially the load/store from/to memory if they are aligned. It's amazing what can be done with only a few instructions. Since Thomas' work I've been trying to code a neural net in MMX - the hardest part is designing a custom back propagation algo for the training. I'm begining to think I should try some genetic algorithms. The speed advantage should be HUGE! Very large neural nets that are superfast.


I thought about optimizations for it as well, however the main problem with MMX is that you can hardly use them for the algo, unless you totally redesign it to use integers.. Maybe something like 3DNow could be used for the algorithm though..

Thomas
Posted on 2002-01-16 12:58:16 by Thomas
Bitrake, I found some MMX docs and you cannot use an MMX reg as a pointer to data or jmp/call. No address opps.
Posted on 2002-01-16 13:09:51 by ThoughtCriminal
Originally posted by Thomas
I thought about optimizations for it as well, however the main problem with MMX is that you can hardly use them for the algo, unless you totally redesign it to use integers.
That is what I'm doing. ;)

Originally posted by CoffeeDrinker
Bitrake, I found some MMX docs and you cannot use an MMX reg as a pointer to data or jmp/call. No address opps.
Okay, now I understand what you mean. Yes, they are only good for manipulation of the data.
Posted on 2002-01-16 13:20:44 by bitRAKE
That is what I'm doing. ;)


Seems like a hard task so good luck ;). It would give a big speed improvement I think.

Thomas
Posted on 2002-01-16 13:28:32 by Thomas