How CPU differentiates between the following instructions while it is in IA-32e, 64 bit, long mode :

PUSH  r/m16
PUSH  r/m64

While the opcode for both is FF/6, they have the same code segment descriptor, no prefixes were used and the default operand size attribute is 8 or 32 bits?!!

Posted on 2010-07-17 02:07:32 by logicman112
logicman112,

If no prefixes are used, (in 64-bit code segment) FF /6 opcode is invariably push r/m64 instruction. Prefix isn't a part of instruction opcode, thus it isn't included.

Read chapter "2. Instruction format" in vol. 2A and subchapter "3.6 Operand-size and address-size attributes" in vol. 1 of Intel SDM, they contain thorough explanation of this.
Posted on 2010-07-17 04:05:40 by baldr
The R/M indicates that the opcode byte(s) is followed by at least, a Mod/RM byte which indicates the encoding size - see Mod/RM tables.
Posted on 2010-07-17 04:07:34 by Homer
Homer,

Are you saying that (in push r/m16 instruction encoding) ModRM byte contains not only EA and part of opcode, but some indication whether this instruction is 16- or 32/64-bit (instead of mode/descriptor/prefix combination)?
Posted on 2010-07-17 04:47:10 by baldr
Thanks a lot for the replies.

Excellent answer by baldr:

Prefix isn't a part of instruction opcode, thus it isn't included.


I wish you success and the best, baldr.

It seems that optional 66H and 67H are not written as part of opcode while compulsory ones are written. Also REX prefixes are written as part of opcode.  
Posted on 2010-07-17 04:53:28 by logicman112
AFAIK - Correct@ both

Theres two ways to encode the 16 bit instruction, at least, that i know of.
One of them is to use the register size prefix, 66/67h
The other is to append a Mod/RM encoding byte to the opcode sequence.
In fact we can use both, so there's 4 combinations.
And those are just the encodings I know about.
And these statements are at least true for 32 bit systems, so I presume extend to 64 bit systems.
Although I know already that the MOV (16 bits) instruction is a special case in 64 bits.

But I don't have a 64 bit system to play with, so all my statements are just from random reading and not actual experience.
I am nonetheless trying my best to get a feel and grip for this, as the time will undoubtedly come soon.
Posted on 2010-07-17 05:04:42 by Homer
If PUSH  r/m16, changes stack pointer by 2, does it change SP or RSP?
if it changes SP (SP may be 1 for example), may it change the upper 16 bits of ESP?

ModR/M byte specifies the addressing mode but this addressing mode may be for 16/32/64 bits as far as i know. According to the mode, 16/32/64 bits , this ModR/M byte will be interpreted and decoded by CPU.

Posted on 2010-07-17 05:15:36 by logicman112

SP "is" RSP
SP is the lower 16 bits of ESP.
ESP is the lower 32 bits of RSP.




[64 bits...                                          32 bits...                  16 bits...]


Does that help?
Posted on 2010-07-17 05:27:18 by Homer
logicman112,

Have you read those chapters? In 64-bit mode stack-address-size is always 64 (RSP), only operand-size (and address-size for memory reference) could be changed. However, in 32-bit legacy/compatibility mode stack-address-size can be either 16- or 32-bit, depending on B bit in stack segment descriptor.




Theres two ways to encode the 16 bit instruction, at least, that i know of.
One of them is to use the register size prefix, 66/67h
The other is to append a Mod/RM encoding byte to the opcode sequence.
In fact we can use both, so there's 4 combinations.
And those are just the encodings I know about.
And these statements are at least true for 32 bit systems, so I presume extend to 64 bit systems.
Although I know already that the MOV (16 bits) instruction is a special case in 64 bits.


Can you show an example of different from 66 FF 30 encoding for push word in 32-bit code? Except obvious addition of superfluous ds segment override prefix. And I didn't quite understand, how ModRM byte can be "appended". Appended to what? It's either part of opcode or not, unlike prefixes that are prepended to opcode.


But I don't have a 64 bit system to play with, so all my statements are just from random reading and not actual experience.
I am nonetheless trying my best to get a feel and grip for this, as the time will undoubtedly come soon.


Think inside the Bochs. ;-)
Posted on 2010-07-17 07:02:25 by baldr