1. what is the size of pointer variable in win32 os?

2. when we said Windows is a 32-bit operating system
what actually does it means, 32 bits is appling on what?
does it means that Windows will work only on 32bit procesors
(procesors that have 32bit registers, 32bit bus etc..)
also what does it means when someone says .. it 32bi application...

3. is little endian byte ordering applied only on memory for x86 procesors
or is it applied on storing data on hard disk
for example if i have some string in text file saved on hard disk,
and open that file with notepad, then in memory (ram) that string from file
will have reverse order than they have in file on hard disk or what?

if text.txt is consist of "string"
then what will look like memory in which that string is stored

4. what is deference between this two

mov eax,
mov eax,eax
Posted on 2002-01-20 12:01:22 by Mikky
1. Depends, could be a dword, word...(I'm not sure)
2. When a program uses 32bit registers(eax, ebx...), it needs a 32bit processor(I considered, Windows as a program).
3. In memory?yes on a file no(but it can be? but makes no sense unless your doing some sort of encryption).
4. the first one(mov eax, )

Posted on 2002-01-20 12:24:13 by stryker
mov ebx, moves the dword from the address indicated by eax to ebx.
mov ebx, eax moves eax to ebx.
I don't know what happened if both are the same regs. But I think it does the same.
Posted on 2002-01-20 12:40:56 by TCT
I don't know what happened if both are the same regs. But I think it does the same.

It does do the same. The cpu copies the eax register to one of the shadow register areas, then loads in the contents of the address it pointed at.

The shadow registers are a bunch of registers with no particular name, their function is to temporarily hold the values of the named registers. They might do other things too, but i'm not an engineer so i dunno. How many shadow registers are there? I don't know about the ia32, but for the ia64, IIRC, there is about 40 of them.

And pointers on a 32bit system are generally 32bits in size (although that may change on other architectures).
Posted on 2002-01-20 14:45:07 by sluggy
1) The size of a pointer is directly proportional to the number of address bits needed to reference it. As Win32 uses a 32bit addressing mode, there are 32bits per "element" of memory (each element is 1 byte long on most processors, but there is no reason you couldn't design a processor with bit precision memory instead).

2) Windows is a 32bit operating system because it needs a 32bit enabled processor, it expects to be able to address memory 2^32 bytes of memory, and will perform mathematical operations on 32bit numbers.
As for the "bus" there are several in processors, and just because you've got a 32bit processor doesn't mean its got a 32bit bus (Pentiums have a 64bit memory bus for instance).
It also means that the processor must have at least 32bit operations available to it (it could also have 64bit too which is what AMD are going to do with the Hammer processor).

3) The Endien-ness of a processor is only visible in the memory, and can only be seen in variables longer than 1 byte. A single 32 bit integer (0xAABBCCDD) will be stored in memory as DD, BB,CC,AA. The reason behind this "master stroke" is so you can move some 8bit number to memory, then (assuming you've got the padding next to it), move it to a 32bit register and have the same value (move with sign extension obviously if it is a signed number).
A string will not be affected by this, as a string is infact a series of bytes, and bytes cannot be swapped. A unicode string will have the high and low bytes swapped, but other than that, the string will be as expected.
So the string "ABCD" will appear as 41,42,43,44 in your favorite hex editor.
If you need to convert between big & little endian, then you can do 16 bit with rol/ror and 32bit with the bswap instruction.

4) There is a difference, the first "mov eax, " will move what is pointed at by eax before the operation, into eax by the end of the operation, the second will copy eax over itself, effectivly doing nothing.

As for what sluggy is saying, the P6 core will do that, because eax etc. don't exist per se, and are dynamically allocated from a bank of registers (which is why you can suffer from partial register stalls because eax, and ax are not the same until a settling period), before the P6 core it would also still work because the data on the rising clock edge is used (ie what is in eax before the instruction), and it is not updated until some point after the falling clock edge.

Posted on 2002-01-20 17:28:27 by Mirno
Mirno basically covered it all... but the endianness *is* also seen
in for instance files, not just in memory. This is why you have to
do endianness conversion when reading data files produced on
big-endian processors. And why you have to use "htons", "htonl"
and friends when dealing with network programming.
Posted on 2002-01-20 18:02:28 by f0dder