This is mainly targeted tward any new coders to assembly.
I gladly add myself to this list :grin:

If you are coding a new procedure with alot of API calls and
happen to have one of the "transparent" registers open
(ie ebx, edi, esi) then this little trick might shave some size
off of your code.

Lately in my code, I have been using the "uses" directive to
save one of the above registers and right after the locals,
xor it to itself to clear it to zero. Then whenever I need a
zero (which in API calls is alot), I sub in the register.

so instead of:
invoke ExtTextOut, hDC, 0, 0, ETO_OPAQUE, ADDR Rect, 0, 0, 0

it would be (with ebx):
invoke ExtTextOut, OShDC, ebx, ebx, ETO_OPAQUE, ADDR Rect, ebx, ebx, ebx

Pushing a zero translates to bytes "6A 00" where push ebx is "53"
so in the above snip thats a savings of 5 bytes. As an added
bonus, it can be tacked on to lea opcodes to shorten its size as
well if needed...

Thought I would just throw that out there, happy coding...
:alright:
Posted on 2002-09-04 00:17:43 by Graebel
Hey cool tip, reminds me of another tip from the old days of Atari Basic, where using variables to contain constants reduced the program size (since each constant was 6 bytes but variables tokenized to two).
Posted on 2002-09-04 04:15:34 by AmkG
I thought it was a nice use for any registers I was not using. However
I might have been a little misleading on my original post about the byte
savings... (sorry!).

After thinking about it, it does require some initial setup so the savings
in the example is technically not 5 bytes, its 1 (setup: one to push the
reg, two for the xor, one for the pop).

The actual savings in bytes reduces to:
(Number of zeros replaced) - 4

So a savings will only be realized when you are replacing more than 4
zeros. The last WM_PAINT proc I did this to contained 25 zeros as
parameters so I got a savings of 21 bytes :)
Posted on 2002-09-04 11:07:45 by Graebel
I would like to have a hard wired zero register in the CPU, like ezx, and even better, also a TRUE register,
maybe etx

a big HEEELLOO to Intel and AMD :)
(did they ever ask asm programmers what to build in into the next generation CPU?)
Posted on 2002-09-04 12:58:23 by beaster
(did they ever ask asm programmers what to build in into the next generation CPU?)
No they shouldn't do that... if they did we would end up with all sorts of HLL stuff built in, which would lead to lots of lamers being able to use asm. I say they should leave it as is, so only hardcore programmers learn it and respect it.
Posted on 2002-09-04 20:40:30 by sluggy

No they shouldn't do that... if they did we would end up with all sorts of HLL stuff built in, which would lead to lots of lamers being able to use asm. I say they should leave it as is, so only hardcore programmers learn it and respect it.


well said my friend. well said. I never really appreciated microprocessors till I started programming in Assembly.
Posted on 2002-09-06 20:50:10 by x86asm
Cant wait myself for the new 64 bit processors:

16 64 bit registers plus
16 128 bit SSE registers plus
MMX/FP registers plus
an extened set of 64 bit control, debug etc registers.

Goto Sandpile for some more information.
Posted on 2002-09-06 21:14:42 by huh

Can't wait myself for the new 64 bit processors.
Me, too! I've been saving up - sure hope they are priced reasonable. {dreaming...} Or, I can get a job just testing out new gizmos?
Posted on 2002-09-06 21:53:05 by bitRAKE

Cant wait myself for the new 64 bit processors:

16 64 bit registers plus
16 128 bit SSE registers plus
MMX/FP registers plus
an extened set of 64 bit control, debug etc registers.

Goto Sandpile for some more information.
I bet this is for the AMD opteron? Does intel itanium really have this much registers?

128 floating point
128 integer
64 predict
8 branch registers.
128 control ("application") registers

???



I'm really confuse which processor should I chose over the other.

AMD is cheap, they have this hyper transport technology, SSE2 will be implemented...

Intel is expensive, they have an "entirely" new architecture, has more registers, hyper threading, doesn't have k3d instruction set...

I wish I'm rich so I can buy both :( (pathetic)
Posted on 2002-09-06 22:33:42 by stryker
No time right now to dig on the reasons.. but I'm waiting for the K8 bigtime. I would never buy the Intel Itanium (let away it costs some insane amount of money anyway :grin: ).

PS: stryker, the registry setting to disable CD autostart worked.. thank you. :)
Posted on 2002-09-07 05:05:50 by Maverick
Intel is expensive, they have an "entirely" new architecture

Its probably just what they learnt from AMD anyway.
Posted on 2002-09-07 06:14:21 by huh

I bet this is for the AMD opteron? Does intel itanium really have this much registers?

128 floating point
128 integer
64 predict
8 branch registers.
128 control ("application") registers

???



I'm really confuse which processor should I chose over the other.

AMD is cheap, they have this hyper transport technology, SSE2 will be implemented...

Intel is expensive, they have an "entirely" new architecture, has more registers, hyper threading, doesn't have k3d instruction set...

I wish I'm rich so I can buy both :( (pathetic)


The Ia-64 does have that many registers. The first 16 are a flat register file. the rest are stack orientated (from what I hear). GR0~GR15.
Posted on 2002-09-07 11:16:11 by x86asm
This is the very best article I read about Hammer and defenitly worth a look:

http://www.xbitlabs.com/cpu/hammer-preview/
Posted on 2002-09-10 12:49:04 by goofee
I think my next computer will have x86-64 CPU... :grin:
Posted on 2002-09-10 12:59:00 by scientica
I know mine will.
I just recently read somewhere that some amd executive
said they're already working on a K9 processor and that it
would be something real big.
If K8 is all it's said to be I wouldn't know what else it takes ;)
Posted on 2002-09-10 13:21:28 by goofee